JPH0119404Y2 - - Google Patents
Info
- Publication number
- JPH0119404Y2 JPH0119404Y2 JP1985101810U JP10181085U JPH0119404Y2 JP H0119404 Y2 JPH0119404 Y2 JP H0119404Y2 JP 1985101810 U JP1985101810 U JP 1985101810U JP 10181085 U JP10181085 U JP 10181085U JP H0119404 Y2 JPH0119404 Y2 JP H0119404Y2
- Authority
- JP
- Japan
- Prior art keywords
- region
- type
- semiconductor
- buried
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/115—Dielectric isolations, e.g. air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
- H01L21/743—Making of internal connections, substrate contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
- H10D84/0119—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs
- H10D84/0121—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs the complementary BJTs being vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
- H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/641—Combinations of only vertical BJTs
- H10D84/643—Combinations of non-inverted vertical BJTs and inverted vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/67—Complementary BJTs
- H10D84/673—Vertical complementary BJTs
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/131—Reactive ion etching rie
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/844,767 US4159915A (en) | 1977-10-25 | 1977-10-25 | Method for fabrication vertical NPN and PNP structures utilizing ion-implantation |
US844767 | 1977-10-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6142862U JPS6142862U (ja) | 1986-03-19 |
JPH0119404Y2 true JPH0119404Y2 (en]) | 1989-06-05 |
Family
ID=25293575
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12368578A Pending JPS5467384A (en) | 1977-10-25 | 1978-10-09 | Longitudinal pnp semiconductor |
JP56201714A Granted JPS57122563A (en) | 1977-10-25 | 1981-12-16 | Method of producing vertical npn and pnp transistor |
JP1985101810U Granted JPS6142862U (ja) | 1977-10-25 | 1985-07-05 | 縦形pnpトランジスタを含む集積回路 |
Family Applications Before (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12368578A Pending JPS5467384A (en) | 1977-10-25 | 1978-10-09 | Longitudinal pnp semiconductor |
JP56201714A Granted JPS57122563A (en) | 1977-10-25 | 1981-12-16 | Method of producing vertical npn and pnp transistor |
Country Status (4)
Country | Link |
---|---|
US (1) | US4159915A (en]) |
EP (1) | EP0001586B1 (en]) |
JP (3) | JPS5467384A (en]) |
DE (1) | DE2861117D1 (en]) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4316319A (en) * | 1977-10-25 | 1982-02-23 | International Business Machines Corporation | Method for making a high sheet resistance structure for high density integrated circuits |
JPS5499580A (en) * | 1977-12-27 | 1979-08-06 | Nec Corp | Semiconductor integrated circuit device |
US4214946A (en) * | 1979-02-21 | 1980-07-29 | International Business Machines Corporation | Selective reactive ion etching of polysilicon against SiO2 utilizing SF6 -Cl2 -inert gas etchant |
US4412376A (en) * | 1979-03-30 | 1983-11-01 | Ibm Corporation | Fabrication method for vertical PNP structure with Schottky barrier diode emitter utilizing ion implantation |
US4425574A (en) | 1979-06-29 | 1984-01-10 | International Business Machines Corporation | Buried injector memory cell formed from vertical complementary bipolar transistor circuits and method of fabrication therefor |
US4254428A (en) * | 1979-12-28 | 1981-03-03 | International Business Machines Corporation | Self-aligned Schottky diode structure and method of fabrication |
US4309812A (en) * | 1980-03-03 | 1982-01-12 | International Business Machines Corporation | Process for fabricating improved bipolar transistor utilizing selective etching |
US4318751A (en) * | 1980-03-13 | 1982-03-09 | International Business Machines Corporation | Self-aligned process for providing an improved high performance bipolar transistor |
US4339767A (en) * | 1980-05-05 | 1982-07-13 | International Business Machines Corporation | High performance PNP and NPN transistor structure |
US4506435A (en) * | 1981-07-27 | 1985-03-26 | International Business Machines Corporation | Method for forming recessed isolated regions |
US4492008A (en) * | 1983-08-04 | 1985-01-08 | International Business Machines Corporation | Methods for making high performance lateral bipolar transistors |
US5098854A (en) * | 1984-07-09 | 1992-03-24 | National Semiconductor Corporation | Process for forming self-aligned silicide base contact for bipolar transistor |
US4947230A (en) * | 1984-09-14 | 1990-08-07 | Fairchild Camera & Instrument Corp. | Base-coupled transistor logic |
DE3883459T2 (de) * | 1987-07-29 | 1994-03-17 | Fairchild Semiconductor | Verfahren zum Herstellen komplementärer kontaktloser vertikaler Bipolartransistoren. |
US5332920A (en) * | 1988-02-08 | 1994-07-26 | Kabushiki Kaisha Toshiba | Dielectrically isolated high and low voltage substrate regions |
IT1230025B (it) * | 1988-10-28 | 1991-09-24 | Sgs Thomson Microelectronics | Dispositivo darlington con transistore di estrazione ed emettitore ultraleggero e relativo procedimento di fabbricazione |
US4951115A (en) * | 1989-03-06 | 1990-08-21 | International Business Machines Corp. | Complementary transistor structure and method for manufacture |
US5026437A (en) * | 1990-01-22 | 1991-06-25 | Tencor Instruments | Cantilevered microtip manufacturing by ion implantation and etching |
US4997775A (en) * | 1990-02-26 | 1991-03-05 | Cook Robert K | Method for forming a complementary bipolar transistor structure including a self-aligned vertical PNP transistor |
US5248624A (en) * | 1991-08-23 | 1993-09-28 | Exar Corporation | Method of making isolated vertical pnp transistor in a complementary bicmos process with eeprom memory |
DE19632412A1 (de) * | 1996-08-05 | 1998-02-12 | Sifu Hu | Vertikaler Bipolartransistor und Verfahren zu seiner Herstellung |
US6344374B1 (en) * | 2000-10-12 | 2002-02-05 | Vanguard International Semiconductor Corporation | Method of fabricating insulators for isolating electronic devices |
US7332818B2 (en) * | 2005-05-12 | 2008-02-19 | Endicott Interconnect Technologies, Inc. | Multi-chip electronic package with reduced line skew and circuitized substrate for use therein |
US7329940B2 (en) * | 2005-11-02 | 2008-02-12 | International Business Machines Corporation | Semiconductor structure and method of manufacture |
US7242071B1 (en) * | 2006-07-06 | 2007-07-10 | International Business Machine Corporation | Semiconductor structure |
US7936041B2 (en) | 2006-09-15 | 2011-05-03 | International Business Machines Corporation | Schottky barrier diodes for millimeter wave SiGe BICMOS applications |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3930909A (en) * | 1966-10-21 | 1976-01-06 | U.S. Philips Corporation | Method of manufacturing a semiconductor device utilizing simultaneous outdiffusion during epitaxial growth |
US3659675A (en) * | 1969-06-30 | 1972-05-02 | Transportation Specialists Inc | Lubrication system and reservoir therefor |
US3611067A (en) * | 1970-04-20 | 1971-10-05 | Fairchild Camera Instr Co | Complementary npn/pnp structure for monolithic integrated circuits |
DE2212168C2 (de) * | 1972-03-14 | 1982-10-21 | Ibm Deutschland Gmbh, 7000 Stuttgart | Monolithisch integrierte Halbleiteranordnung |
JPS4911659U (en]) * | 1972-05-09 | 1974-01-31 | ||
US3861968A (en) * | 1972-06-19 | 1975-01-21 | Ibm | Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition |
DE2262297C2 (de) * | 1972-12-20 | 1985-11-28 | Ibm Deutschland Gmbh, 7000 Stuttgart | Monolithisch integrierbare, logisch verknüpfbare Halbleiterschaltungsanordnung mit I↑2↑L-Aufbau |
US3924264A (en) * | 1973-05-17 | 1975-12-02 | Ibm | Schottky barrier device and circuit application |
US3901735A (en) * | 1973-09-10 | 1975-08-26 | Nat Semiconductor Corp | Integrated circuit device and method utilizing ion implanted and up diffusion for isolated region |
US3968272A (en) * | 1974-01-25 | 1976-07-06 | Microwave Associates, Inc. | Zero-bias Schottky barrier detector diodes |
NL7408110A (nl) * | 1974-06-18 | 1975-12-22 | Philips Nv | Halfgeleiderinrichting met complementaire tran- sistorstrukturen en werkwijze ter vervaardiging daarvan. |
GB1516304A (en) * | 1974-07-25 | 1978-07-05 | Dunlop Ltd | Outflow meter |
US4199775A (en) * | 1974-09-03 | 1980-04-22 | Bell Telephone Laboratories, Incorporated | Integrated circuit and method for fabrication thereof |
US3999080A (en) * | 1974-12-23 | 1976-12-21 | Texas Instruments Inc. | Transistor coupled logic circuit |
DE2509530C2 (de) * | 1975-03-05 | 1985-05-23 | Ibm Deutschland Gmbh, 7000 Stuttgart | Halbleiteranordnung für die Grundbausteine eines hochintegrierbaren logischen Halbleiterschaltungskonzepts basierend auf Mehrfachkollektor-Umkehrtransistoren |
CA1056513A (en) * | 1975-06-19 | 1979-06-12 | Benjamin J. Sloan (Jr.) | Integrated logic circuit and method of fabrication |
US4005469A (en) * | 1975-06-20 | 1977-01-25 | International Business Machines Corporation | P-type-epitaxial-base transistor with base-collector Schottky diode clamp |
US4032962A (en) * | 1975-12-29 | 1977-06-28 | Ibm Corporation | High density semiconductor integrated circuit layout |
US4106049A (en) * | 1976-02-23 | 1978-08-08 | Tokyo Shibaura Electric Co., Ltd. | Semiconductor device |
DE2624409C2 (de) * | 1976-05-31 | 1987-02-12 | Siemens AG, 1000 Berlin und 8000 München | Schottky-Transistor-Logik-Anordnung |
US4021270A (en) * | 1976-06-28 | 1977-05-03 | Motorola, Inc. | Double master mask process for integrated circuit manufacture |
US4087900A (en) * | 1976-10-18 | 1978-05-09 | Bell Telephone Laboratories, Incorporated | Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions |
-
1977
- 1977-10-25 US US05/844,767 patent/US4159915A/en not_active Expired - Lifetime
-
1978
- 1978-10-03 DE DE7878101056T patent/DE2861117D1/de not_active Expired
- 1978-10-03 EP EP78101056A patent/EP0001586B1/de not_active Expired
- 1978-10-09 JP JP12368578A patent/JPS5467384A/ja active Pending
-
1981
- 1981-12-16 JP JP56201714A patent/JPS57122563A/ja active Granted
-
1985
- 1985-07-05 JP JP1985101810U patent/JPS6142862U/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
EP0001586B1 (de) | 1981-09-23 |
JPS6142862U (ja) | 1986-03-19 |
JPS5467384A (en) | 1979-05-30 |
JPS57122563A (en) | 1982-07-30 |
DE2861117D1 (en) | 1981-12-10 |
EP0001586A1 (de) | 1979-05-02 |
US4159915A (en) | 1979-07-03 |
JPH0123953B2 (en]) | 1989-05-09 |
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